← Back to jobsPosted (ATS) 5/21/2026, 12:00:00 AM Updated (ATS) 5/21/2026, 12:00:00 AM First seen by us 8/2/2026, 7:01:52 AM Last re-seen 8/22/2026, 11:15:49 PM Distinct job IDs 2 Open in parallel 1 Work locations 1 Cumulative days active 95 Stagnancy score 58.76 ATS job ID 2013153 Apply to the latest listing (your funeral) →
GhostHigh-confidence zombie posting. HR is probably not actually hiring.
ASIC Engineering Digital Design Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 12-16 Years | Pune)
Cisco · Pune, India
A posting in this role has sat open 95 days — well past the 90-day mark where an opening reads as a resume black hole rather than an active search.
Rotation timeline
Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.
These IDs appeared over a 81-day span, with only the latest still open — a sequential re-shelving pattern.
- Location
- Pune, India
- Posted (ATS)
- May 21, 2026
- Last confirmed open
- Aug 22, 2026
- Open for
- 94 days +
- Location
- Pune, India
- Posted (ATS)
- —
- Ended (last seen)
- Aug 11, 2026
- Open for
- 2 days
Data provenance
- Source platform
- workday
- Stream ID
- 1b2c6573-df7d-42e3-94bb-8f0339872adc