Ghost

ASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune)

Cisco · Pune, India

A posting in this role has sat open 95 days — well past the 90-day mark where an opening reads as a resume black hole rather than an active search.

Posted (ATS)

5/21/2026, 12:00:00 AM

Updated (ATS)

5/21/2026, 12:00:00 AM

First seen by us

8/2/2026, 7:01:52 AM

Last re-seen

8/22/2026, 11:15:49 PM

Distinct job IDs

Open in parallel

Work locations

Cumulative days active

Stagnancy score

58.76

ATS job ID

2013154

Rotation timeline

Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.

Rotation 1LatestID 2013154Still openView listing →
Location
Pune, India
Posted (ATS)
May 21, 2026
Last confirmed open
Aug 22, 2026
Open for
94 days +

Data provenance

Source platform: workday
Source API URL: https://cisco.wd5.myworkdayjobs.com/wday/cxs/cisco/cisco_careers/jobs
Latest listing found: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Pune-India/ASIC-Engineering-Digital-Designer--Leader---digital-design--FSM--CPU-sub-systems--complex-SOCs--FPGA-validation---8-12-Years---Pune-_2013154
Stream ID: 451193c7-e8e6-45bb-8125-aaa22ea5b5ac

Apply to the latest listing (your funeral) →