← Back to jobsPosted (ATS) 8/2/2026, 12:00:00 AM Updated (ATS) 8/2/2026, 12:00:00 AM First seen by us 8/13/2026, 12:17:46 AM Last re-seen 8/22/2026, 12:46:04 AM Distinct job IDs 4 Open in parallel 2 Work locations 1 Cumulative days active 33 Stagnancy score 0 ATS job ID JR0286121
Multiple OpeningsSeveral job IDs open in parallel under one title — likely genuine multiple openings, not a recycled req.
Mixed Signal Design Verification Engineer
Intel · India, Bangalore
2 job IDs open in parallel rather than re-posted over time — most likely several genuine openings, not a recycle.
Rotation timeline
Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.
3 of these IDs are open at the same time. Likely parallel reqs for the same normalized title rather than sequential re-posting.
- Location
- India, Bangalore
- Posted (ATS)
- Jul 21, 2026
- Last confirmed open
- Aug 22, 2026
- Open for
- 32 days +
- Location
- India, Bangalore
- Posted (ATS)
- Aug 2, 2026
- Last confirmed open
- Aug 22, 2026
- Open for
- 20 days +
- Location
- India, Bangalore
- Posted (ATS)
- Aug 17, 2026
- Last confirmed open
- Aug 22, 2026
- Open for
- 5 days +
- Location
- India, Bangalore
- Posted (ATS)
- —
- Ended (last seen)
- Aug 19, 2026
- Open for
- 2 days
Data provenance
- Source platform
- workday
- Latest listing found
- https://intel.wd1.myworkdayjobs.com/external/job/India-Bangalore/Mixed-Signal-Design-Verification-Engineer_JR0285752-1
- Stream ID
- 58945361-a650-40f6-b3e2-79380b08d513