← Back to jobsPosted (ATS) 8/6/2026, 12:00:00 AM Updated (ATS) 8/6/2026, 12:00:00 AM First seen by us 8/8/2026, 11:30:22 AM Last re-seen 10/19/2026, 11:45:31 AM Distinct job IDs 1 Open in parallel 1 Work locations 1 Cumulative days active 74 Stagnancy score 50.89 ATS job ID R264360
Suspected GhostRotation or age signals smell off. Proceed with skepticism.
Staff Design Verification Engineer – SoC and eFPGA
Analogdevices · US, CA, San Jose, Rio Robles
A posting in this role has sat open 74 days — past the 45-day mark where openings start to look less like an active, immediate need.
Rotation timeline
Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.
- Location
- US, CA, San Jose, Rio Robles
- Posted (ATS)
- Aug 6, 2026
- Last confirmed open
- Oct 19, 2026
- Open for
- 74 days +
Data provenance
- Source platform
- workday
- Latest listing found
- https://analogdevices.wd1.myworkdayjobs.com/external/job/US-CA-San-Jose-Rio-Robles/Staff-Design-Verification-Engineer---SoC-and-eFPGA_R264360
- Stream ID
- f8868e39-3bc9-4f23-b753-7f5726662d65