Fresh

Mixed Signal Logic Design Engineer

Intel · US, Oregon, Hillsboro

Within normal posting window. For now.

Posted (ATS)

7/13/2026, 12:00:00 AM

Updated (ATS)

7/13/2026, 12:00:00 AM

First seen by us

8/13/2026, 12:17:46 AM

Last re-seen

8/22/2026, 12:46:04 AM

Distinct job IDs

Open in parallel

Work locations

Cumulative days active

Stagnancy score

43.33

ATS job ID

JR0285536

Rotation timeline

Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.

Rotation 1LatestID JR0285536Still openView listing →
Location
US, Oregon, Hillsboro
Posted (ATS)
Jul 13, 2026
Last confirmed open
Aug 22, 2026
Open for
40 days +

Data provenance

Source platform: workday
Source API URL: https://intel.wd1.myworkdayjobs.com/wday/cxs/intel/external/jobs
Latest listing found: https://intel.wd1.myworkdayjobs.com/external/job/US-Oregon-Hillsboro/Mixed-Signal-Logic-Design-Engineer_JR0285536
Stream ID: 756d530f-9fbe-4ec7-8c67-0fd105be6d15

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