← Back to jobsPosted (ATS) 9/16/2026, 12:00:00 AM Updated (ATS) 9/16/2026, 12:00:00 AM First seen by us 9/17/2026, 6:00:43 PM Last re-seen 10/18/2026, 7:31:09 AM Distinct job IDs 3 Open in parallel 2 Work locations 2 Cumulative days active 44 Stagnancy score 4.1 ATS job ID JR0287127
Multiple OpeningsSeveral job IDs open in parallel under one title — likely genuine multiple openings, not a recycled req.
Senior Analog Design Engineer
Intel · US, California, Santa Clara
2 job IDs open in parallel rather than re-posted over time — most likely several genuine openings, not a recycle.
Rotation timeline
Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.
These IDs are spread across 2 different work locations — almost certainly separate openings per city/region, not one role re-posted over and over.
- Location
- US, Arizona, Phoenix
- Posted (ATS)
- Aug 17, 2026
- Ended (last seen)
- Aug 26, 2026
- Open for
- 9 days
- Location
- US, California, Santa Clara
- Posted (ATS)
- Sep 16, 2026
- Last confirmed open
- Oct 18, 2026
- Open for
- 32 days +
- Location
- US, California, Santa Clara
- Posted (ATS)
- Sep 16, 2026
- Last confirmed open
- Oct 18, 2026
- Open for
- 32 days +
Data provenance
- Source platform
- workday
- Latest listing found
- https://intel.wd1.myworkdayjobs.com/external/job/US-California-Santa-Clara/Senior-Analog-Design-Engineer_JR0287142
- Stream ID
- 119d060b-1618-498f-9033-9976e3abe785