Altera
241 active postings tracked via workday · 135 flagged suspicious
Large employer · high-volume employer (legitimately reposts more)
These measure different things: ghosty now is a snapshot of roles open today; lifetime ratespans every req ever posted (most of which closed normally), so the two aren’t a before-and-after. For when the freeze actually built up, see the timeline below.
When the freeze built up
Each bar is how many of Altera’s currently-open reqs — ones flagged ghost or suspected right now — first went up that year. Taller recent bars mean the freeze is still growing; the left bar is the long-frozen tail.
Describes the age of today’s open pile — not a historical rate. We’ve only tracked postings live since June 2026; earlier dates come from each req’s original post date.
- Analog Layout Design Engineersuspected_ghost · 79.08
- A&D Product Program Managerghost · 78.16
- FPGA Silicon Design Verification Engineerghost · 77.09
- FPGA Silicon Design Verification Engineerghost · 77.09
- FPGA Silicon Design Verification Engineerghost · 77.09
- FPGA Silicon Design Verification Engineerghost · 77.09
- FPGA Silicon Design Verification Engineerghost · 77.09
- Principal Logic Design Engineerghost · 76.94
- Design Verification Engineerghost · 75.56
- Principal Verification Engineerghost · 75.56
- Senior Design Automation Engineer - Front End Design Verificationghost · 74.8
- Product Development Engineerghost · 74.04
- Product Development Engineerghost · 74.04
- Product Development Engineerghost · 74.04
- FPGA Board Applications Engineerghost · 73.88
- Senior Technical Program Managerghost · 73.73
- Senior SoC Design Verification Engineerghost · 73.73
- Technical Program Managerghost · 73.73
- Sr. SoC Design Verification Engineerghost · 73.73
- Custom Physical Design Engineerghost · 72.97
- Firmware Functional Safety Engineerghost · 72.51
- Hardware SOC Functional Safety Engineer (FSE)ghost · 72.51
- Power BI Developerghost · 72.36
- Sr. Fabric Data Engineerghost · 72.36
- Sr. Fabric Data Engineerghost · 72.36
- Firmware Development Engineerghost · 72.05
- Oracle EPM Architect / Application Engineerghost · 70.83
- SoC Design Verification Leadghost · 69.76
- Analog Layout Design Engineerghost · 69.76
- Senior Design Verification Engineerghost · 69.45
- CAD Support - Studentghost · 68.84
- Senior OSAT Engineer (Part-Time, Contract)ghost · 68.39
- FPGA DDR and IO Subsystem Architectghost · 67.47
- ITAR Specialistghost · 67.01
- Analog Circuit Design Engineersuspected_ghost · 66.4
- APAC Regional Trade Managerghost · 65.94
- Staff DFT Design Engineerghost · 65.94
- Analog Layout Design Engineer (College Graduate)ghost · 65.48
- DFX Design Architectghost · 65.48
- Physical Design Engineerghost · 64.26
- Physical Design Engineerghost · 64.26
- FPGA Development Tools Engineerghost · 64.11
- FPGA Development Tools Engineerghost · 64.11
- FPGA Development Tools Engineerfresh · 64.11
- Design Verification Engineerghost · 63.8
- Design Verification Engineerfresh · 63.8
- Director of Foundry Engineeringghost · 63.35
- Senior Design Verification Engineerghost · 63.04
- Lead Design Verification Engineerfresh · 62.89
- Lead Design Verification Engineerghost · 62.89
- Performance Modeling Engineerghost · 62.89
- Product Development Engineerfresh · 62.73
- Product Development Engineerghost · 62.73
- Product Development Engineerfresh · 62.73
- Robotics and Industrial Solutions Engineering Leadghost · 62.28
- Junior Logic Design Engineerghost · 61.97
- Internal Sales Representativeghost · 61.67
- FPGA Silicon Validation Engineerfresh · 61.36
- FPGA Silicon Validation Engineerfresh · 61.36
- Engineering Leader of AI Transformationghost · 61.21
- Salesforce Senior Engineer- Sales Cloudghost · 61.05
- Supply Chain Planning Architectghost · 60.9
- Senior / Principal GRC Analystghost · 59.99
- Senior Web Developerghost · 59.83
- Senior DevOps Engineer – CMS Platformghost · 59.83
- Silicon Design Methodology and Automation - RVghost · 59.53
- Signal Integrity & Power Integrity Principal Engineerghost · 59.37
- DDR Memory Interface System Validation Lead Engineerghost · 59.37
- Senior Debug Verification Engineerghost · 59.22
- Design Verification Engineerghost · 59.07
- Design verification Engineerghost · 59.07
- Senior SoC Design Verification Engineerghost · 59.07
- Staff Embedded Linux Engineerghost · 58.92
- Treasury Managerghost · 58.92
- FPGA Silicon Design Engineerghost · 58.76
- Oracle Fusion Cloud Security Adminghost · 58.76
- Oracle Fusion ERP Inventory & Manufacturing Architectghost · 58.76
- FPGA Silicon Design Engineerfresh · 58.76
- Oracle Fusion Cloud Technical Lead/Managerghost · 58.76
- Software Engineering Manager - Graphical User Interface (GUI)ghost · 58.61
- Sales Account Managerghost · 58.46
- Regional Security Manager, APACghost · 58.46
- FPGA Post Silicon Validation Engineersuspected_ghost · 56.67
- High Level Synthesis Compiler Engineersuspected_ghost · 56.22
- Analog Circuit Design Engineersuspected_ghost · 54.89
- Senior Aerospace, Defense, Government (ADG) Quality Management System Engineersuspected_ghost · 54.89
- Senior OSAT Engineerfresh · 54.44
- Clocking Architectsuspected_ghost · 54.44
- Senior OSAT Engineersuspected_ghost · 54.44
- FPGA Development Tools Engineer – Synthesissuspected_ghost · 54
- FP&A Managersuspected_ghost · 54
- Senior FPGA Compiler (Router) Engineersuspected_ghost · 54
- FPGA Development Tools Engineer – Synthesissuspected_ghost · 54
- Senior FPGA Compiler (Router) Engineersuspected_ghost · 54
- Oracle Fusion ERP Order Management Business Analystsuspected_ghost · 54
- Supply Chain Execution Technical Leadsuspected_ghost · 53.56
- Oracle EPM Architect / Application Engineersuspected_ghost · 53.56
- Senior FPGA Security Architect– Aerospace, Defense & Governmentsuspected_ghost · 53.56
- FPGA SW Validation Engineersuspected_ghost · 53.56
- Virtualization & Cloud Platform Engineersuspected_ghost · 51.78
- Robotics Solutions Architectsuspected_ghost · 51.78
- DevOps CI/CD Software Engineering Managersuspected_ghost · 51.78
- Finance Manager - Procure To Paysuspected_ghost · 51.33
- CPU Design Verification Engineersuspected_ghost · 51.33
- Finance Manager - Record To Reportsuspected_ghost · 51.33
- MTS Product Development Engineersuspected_ghost · 50.89
- Senior MTS Product Development Engineeringsuspected_ghost · 50.89
- FPGA Development Tools Engineersuspected_ghost · 50.89
- Senior Data Engineersuspected_ghost · 50.44
- Ethernet IP Design Application Engineersuspected_ghost · 50.44
- Ethernet IP Design Application Engineersuspected_ghost · 50.44
- Static Timing Analysis (STA) Engineersuspected_ghost · 50
- Manager, Static Timing Analysis (STA)suspected_ghost · 50
- Sales Applications Engineersuspected_ghost · 48.67
- Signal Integrity & Power Integrity Engineersuspected_ghost · 48.67
- Signal Integrity & Power Integrity Engineerfresh · 48.67
- DFT Design Engineersuspected_ghost · 48.67
- Principal NoC IP Micro-Architectsuspected_ghost · 48.22
- Senior Oracle Fusion Business Analyst – Invoice to Cashsuspected_ghost · 48.22
- Senior Oracle Fusion Business Analyst - Record to Reportsuspected_ghost · 48.22
- Principal Engineer - Agentic AI Architectsuspected_ghost · 48.22
- IT End User Support Specialistsuspected_ghost · 48.22
- FPGA Configuration Architectsuspected_ghost · 48.22
- Principal DFT Architectsuspected_ghost · 47.78
- DFT Architectsuspected_ghost · 47.33
- FPGA Compiler (Placer) Engineersuspected_ghost · 45.11
- Post Silicon and System Validation Engineer Studentsuspected_ghost · 44.67
- Enterprise Sr/Staff DevOps Developersuspected_ghost · 44.67
- Post Silicon and System Validation Engineersuspected_ghost · 44.67
- ML/AI Timing and Power Flow Expertsuspected_ghost · 44.67
- FPGA IP Software Development Engineerfresh · 44.22
- Engineering/IT Specialistsuspected_ghost · 44.22
- FPGA IP Software Development Engineersuspected_ghost · 44.22
- FPGA Customer Quality Engineersuspected_ghost · 43.78
- Principal Engineer, Design Verification - DDR Memory Subsystemssuspected_ghost · 43.78
- IT & Audio Visual Support Specialistsuspected_ghost · 42.44
- SOC Frontend Integration Engineersuspected_ghost · 41.56
- Senior MLOps & AI Infrastructure Engineersuspected_ghost · 41.56
- SatCom, ISR & Space Payload Architectsuspected_ghost · 41.56
- Customer Projects Hardware Engineer – Aerospace, Defense & Government (ADG)suspected_ghost · 41.56
- Senior Tax Analystsuspected_ghost · 41.11
- Workday Contractor - Recruiting Modulesuspected_ghost · 39.33
- Sr. Director, Boards, Packages, Reliabilitysuspected_ghost · 39.33
- Physical Design Technical Leadsuspected_ghost · 38.89
- Senior Principal Engineer (PE) / Subject Matter Expert (SME) – Quartus Timing Analysis & Optimizationsuspected_ghost · 38
- General Support Engineer – Aerospace, Defense & Government (ADG)suspected_ghost · 38
- Product Validation Engineermultiple_openings · 10.88
- Physical Design Engineermultiple_openings · 6.75
- Physical Design Engineermultiple_openings · 6.75
- Physical Design Engineermultiple_openings · 6.75
- Physical Design Engineermultiple_openings · 6.75
- Product Owner/Business Analyst - EDW & Reporting Solutions-Supply Chain & Financefresh · 0
- Silicon Domain Architectfresh · 0
- PCIe IP Planner (Product Manager)fresh · 0
- Digital Marketing Managerfresh · 0
- Post-si LAB supportfresh · 0
- Digital Marketing Specialist/Managerfresh · 0
- FPGA Compiler (Placer) Engineerfresh · 0
- Workday Contractor - Recruiting / Learning Modulesfresh · 0
- Strategic Lab Operations Engineerfresh · 0
- Timing Engineerfresh · 0
- Customer Operations & Inside Sales Representativefresh · 0
- BootROM & Firmware Developerfresh · 0
- Sr Manager/Manager (Record-to-Report)fresh · 0
- Senior Physical Design Engineerfresh · 0
- Cyber Resilience Act (CRA) Compliance Leadfresh · 0
- FPGA Silicon Design Verification Engineermultiple_openings · 0
- Security Operations Center Leadfresh · 0
- Software Validation Engineerfresh · 0
- Wireline Marketing Manager (Routing/Switching, Security)fresh · 0
- Business Development Manager – Physical AIfresh · 0
- Analog Circuit Design Engineerfresh · 0
- FPGA Silicon Design Verification Engineermultiple_openings · 0
- Package Architectfresh · 0
- Senior Technical Accounting Analystfresh · 0
- GL Accounting Managerfresh · 0
- Senior Revenue Managerfresh · 0
- Field Applications Engineer (FAE)fresh · 0
- Senior Emulation Engineerfresh · 0
- Senior General Ledger Analystfresh · 0
- Memory Validation Architectfresh · 0
- FPGA System Design Engineerfresh · 0
- Data Engineermultiple_openings · 0
- Senior FPGA Design Engineermultiple_openings · 0
- Global Benefits Specialistfresh · 0
- IP Firmware Design Engineerfresh · 0
- Senior FPGA Circuit Design Engineerfresh · 0
- Sales Applications Engineerfresh · 0
- Senior Field Sales Managerfresh · 0
- Senior FPGA Design Engineermultiple_openings · 0
- Software Product Managerfresh · 0
- Senior FPGA IP Solution Design Engineerfresh · 0
- Field Applications Engineer (FAE)fresh · 0
- Custom Circuit Design Engineerfresh · 0
- Graduate Engineer – FPGA HPS USB Post-Silicon Validationfresh · 0
- FPGA Post Silicon Validation Engineer - HPS USBfresh · 0
- Inside Sales Representative (Sales)fresh · 0
- Product Physical Failure Analysis Engineerfresh · 0
- Senior Physical Design Engineerfresh · 0
- Physical Design Engineermultiple_openings · 0
- Physical Design Engineermultiple_openings · 0
- Signal Integrity/ Power Integrity Engineerfresh · 0
- SOC Timing Engineerfresh · 0
- Director, Finance Transformation & Programsfresh · 0
- Sales Analystmultiple_openings · 0
- AI Engineer – Cloud Software & AI Platforms - Contractfresh · 0
- Sales Analystmultiple_openings · 0
- Principal NoC IP Micro-Architectfresh · 0
- IT End User Support Specialistfresh · 0
- Functional Safety Architectfresh · 0
- Senior Package Reliability Engineerfresh · 0
- Security Product Marketing Managerfresh · 0
- Physical Design Implementation and STA Leadfresh · 0
- Functional Safety Architectfresh · 0
- Student Signal and Power Integrity Engineerfresh · 0
- FPGA Hardware Board Design Engineerfresh · 0
- Senior Manufacturing and Supplier Quality Engineerfresh · 0
- Business Development Manager - Machine Visionfresh · 0
- Senior Director, Lead of Customer Operationsfresh · 0
- Oracle Fusion Cloud Technical Architectfresh · 0
- Product Owner/Business Analystfresh · 0
- Product Owner/Business Analyst - EDW & Reporting Solutions-Supply Chain & Financemultiple_openings · 0
- Design Automation Engineerfresh · 0
- Software Enabling and Optimization Engineerfresh · 0
- Full Life Cycle Recruiterfresh · 0
- Workday Contractor - Recruiting / Learning Modulesfresh · 0
- Lead Product Plannerfresh · 0
- Logistics Managerfresh · 0
- DDR Memory Interface System Validation Lead Engineermultiple_openings · 0
- Customer Operations & Inside Sales Representativefresh · 0
- AI Engineer – Technical Leader (Agentic AI & FPGA Systems)fresh · 0
- Director of Engineeringfresh · 0
- Design Verification Engineerfresh · 0
- DDR Memory Interface System Validation Lead Engineermultiple_openings · 0
- Project/Program Manager, Web and Digital - Contractfresh · 0
- Blue Yonder Technical Leadfresh · 0
- Sr Salesforce Solution Architectfresh · 0
- Integration Lead – Supply Chain Planning (Blue Yonder)fresh · 0
- Customer Operations & Inside Sales Representativefresh · 0
- Analog Design Layout Managerfresh · 0
- Data Engineermultiple_openings · 0