FreshRepeat offender company

FPGA IP Design and Verification Engineer

Altera · Regus, Madhapur

Within normal posting window. For now.

Posted (ATS)

9/21/2026, 12:00:00 AM

Updated (ATS)

9/21/2026, 12:00:00 AM

First seen by us

9/22/2026, 5:00:23 AM

Last re-seen

10/18/2026, 9:15:39 PM

Distinct job IDs

Open in parallel

Work locations

Cumulative days active

Stagnancy score

ATS job ID

R02945

Rotation timeline

Every ATS job ID we've matched to this same normalized title, oldest first. "Posted" is the date the ATS reports; "last confirmed open" is the last time we saw it live.

Rotation 1LatestID R02945Still openView listing →
Location
Regus, Madhapur
Posted (ATS)
Sep 21, 2026
Last confirmed open
Oct 18, 2026
Open for
28 days +

Data provenance

Source platform: workday
Source API URL: https://altera.wd1.myworkdayjobs.com/wday/cxs/altera/altera/jobs
Latest listing found: https://altera.wd1.myworkdayjobs.com/Altera/job/Regus-Madhapur/FPGA-IP-Design-and-Verification-Engineer_R02945
Stream ID: 5252a2ca-cbb0-4b99-8edf-68bb005267b1

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